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Cache memory
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#	Item
801	Morsel-Driven Parallelism: A NUMA-Aware Query Evaluation Framework for the Many-Core Age Viktor Leis∗ Peter Boncz† ∗ Add to Reading List Source URL: www-db.in.tum.de Language: English - Date: 2014-04-30 03:51:16 Threads Computer architecture Computer memory Central processing unit Simultaneous multithreading CPU cache Non-Uniform Memory Access Multithreading Hyper-threading Computing Computer programming Parallel computing
802	Location-Based Memory Fences Edya Ladan-Mozes I-Ting Angelina Lee Dmitry Vyukov∗ Add to Reading List Source URL: people.csail.mit.edu Language: English - Date: 2011-05-12 16:11:00 Central processing unit Computer memory Concurrency control Instruction set architectures Memory barrier CPU cache Parallel computing Linearizability Microarchitecture Computer architecture Computing Computer hardware
803	18-447: Computer Architecture Lecture 28: Runahead Execution Prof. Onur Mutlu Carnegie Mellon University Spring 2013, [removed] Add to Reading List Source URL: www.ece.cmu.edu Language: English - Date: 2013-04-14 20:33:03 Central processing unit Scheduling algorithms Runahead Scheduling CPU cache Thread C dynamic memory allocation Hardware scout Computing Computer architecture Computer hardware
804	CH A P T E R 5 Displaying ACE Hardware and Software System Information Add to Reading List Source URL: www.cisco.com Language: English Computer hardware Memory management Paging CPU cache MIPS architecture Procfs Conventional memory Computer architecture Computer memory Virtual memory
805	../figures/throughput-wb.eps Add to Reading List Source URL: www.cc.gatech.edu Language: English - Date: 2012-02-27 11:12:57 Cache Logical block addressing Data buffer File system Paging Disk storage Computer hardware Computer memory Computing
806	Sentry: Light-Weight Auxiliary Memory Access Control ∗ Arrvindh Shriraman Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2010-04-19 17:30:58 Parallel computing Central processing unit Virtual memory Cache CPU cache Memory protection Page table Multi-core processor Shared memory Computing Computer hardware Computer memory
807	Runnemede: An Architecture for Ubiquitous High-Performance Computing Nicholas P. Carter1,4 , Aditya Agrawal1,2 , Shekhar Borkar1 , Romain Cledat1 , Howard David1 , Dave Dunning1 , Joshua Fryman1 , Ivan Ganev1 , Roger A. Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2013-01-25 16:45:04 CPU cache Multi-core processor Dynamic random-access memory Scratchpad memory Random-access memory Central processing unit Parallel computing ANT Computer memory Computer hardware Computing
808	Microsoft PowerPoint - 2014_431_Nanda_ppt.pptx Add to Reading List Source URL: www.proligence.com Language: English - Date: 2014-04-10 20:55:02 Data buffer Oracle Database TES Computing Technology Electronics Computer memory Buffer Cache
809	Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU by William J. Bowhill, Shane L. Bell, Bradley J. Benschneider, Andrew J. Black, Sharon M. Britton, Ruben W. Castelino, Dale R. Donchin, John H. Add to Reading List Source URL: www.hpl.hp.com Language: English - Date: 2003-03-18 14:04:55 Central processing unit Computer memory Microprocessors Parallel computing Alpha 21064 Alpha 21164 Microarchitecture Flip-flop CPU cache Computer hardware Computer architecture Computing
810	Microsoft Word - 2014_431_Nanda_ppr.docx Add to Reading List Source URL: www.proligence.com Language: English - Date: 2014-04-10 20:57:14 Electronics Oracle Database Data buffer Cache Flip-flop Circular buffer Buffer Computer memory Computing Software

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